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CONFIG_BF561_COREB_RESET: Enable Core B reset support

General informations

The Linux kernel configuration item CONFIG_BF561_COREB_RESET:

Help text

This requires code in the application that is loaded into Core B. In order to reset, the application needs to install an interrupt handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0. This causes Core B to stall when Supplemental Interrupt 0 is set, and will reset PC to 0xff600000 when COREB_SRAM_INIT is cleared.



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