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CONFIG_8xx_CPU15: CPU15 Silicon Errata

General informations

The Linux kernel configuration item CONFIG_8xx_CPU15:

Help text

This enables a workaround for erratum CPU15 on MPC8xx chips. This bug can cause incorrect code execution under certain circumstances. This workaround adds some overhead (a TLB miss every time execution crosses a page boundary), and you may wish to disable it if you have worked around the bug in the compiler (by not placing conditional branches or branches to LR or CTR in the last word of a page, with a target of the last cache line in the next page), or if you have used some other workaround.

If in doubt, say Y here.



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