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CONFIG_ARM64_ERRATUM_2054223: Cortex-A710: 2054223: workaround TSB instruction failing to flush trace

General informations

The Linux kernel configuration item CONFIG_ARM64_ERRATUM_2054223:

Help text

Enable workaround for ARM Cortex-A710 erratum 2054223

Affected cores may fail to flush the trace data on a TSB instruction, when the PE is in trace prohibited state. This will cause losing a few bytes of the trace cached.

Workaround is to issue two TSB consecutively on affected cores.

If unsure, say Y.



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