CONFIG_ARM64_ERRATUM_827319: Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect

General informations

The Linux kernel configuration item CONFIG_ARM64_ERRATUM_827319:

• prompt: Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect
• type: bool
• depends on: (none)
• defined in arch/arm64/Kconfig
• found in Linux kernels: 3.19, 4.0–4.20, 5.0–5.19, 6.0–6.12

Help text

This option adds an alternative code sequence to work around ARM erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI master interface and an L2 cache.

Under certain conditions this erratum can cause a clean line eviction to occur at the same time as another transaction to the same address on the AMBA 5 CHI interface, which can cause data corruption if the interconnect reorders the two transactions.

The workaround promotes data cache clean instructions to data cache clean-and-invalidate. Please note that this does not necessarily enable the workaround, as it depends on the alternative framework, which will only patch the kernel if an affected CPU is detected.

If unsure, say Y.

Hardware

LKDDb

Raw data from LKDDb:

• (none)

Sources

This page is automaticly generated with free (libre, open) software lkddb(see lkddb-sources).

The data is retrived from:

• Linux kernel
• Linux Kernel Driver DataBase (LKDDb)

Automatic links from Google (and ads)

Custom Search

Popular queries: