CONFIG_ARM_ERRATA_814220: ARM errata: Cache maintenance by set/way operations can execute out of order

General informations

The Linux kernel configuration item CONFIG_ARM_ERRATA_814220:

• prompt: ARM errata: Cache maintenance by set/way operations can execute out of order
• type: bool
• depends on: CONFIG_CPU_V7
• defined in arch/arm/Kconfig
• found in Linux kernels: 5.3–5.19, 6.0–6.12, 6.13-rc+HEAD

Help text

The v7 ARM states that all cache and branch predictor maintenance operations that do not specify an address execute, relative to each other, in program order. However, because of this erratum, an L2 set/way cache maintenance operation can overtake an L1 set/way cache maintenance operation. This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3, r0p4, r0p5.

Hardware

LKDDb

Raw data from LKDDb:

• (none)

Sources

This page is automaticly generated with free (libre, open) software lkddb(see lkddb-sources).

The data is retrived from:

• Linux kernel
• Linux Kernel Driver DataBase (LKDDb)

Automatic links from Google (and ads)

Custom Search

Popular queries: