CONFIG_MEMMAP_CACHEATTR: Cache attributes for the memory address space

General informations

The Linux kernel configuration item CONFIG_MEMMAP_CACHEATTR:

• prompt: Cache attributes for the memory address space
• type: hex
• depends on: ! CONFIG_MMU
• defined in arch/xtensa/Kconfig
• found in Linux kernels: 4.19–4.20, 5.0–5.19, 6.0–6.8, 6.9-rc+HEAD

Help text

These cache attributes are set up for noMMU systems. Each hex digit specifies cache attributes for the corresponding 512MB memory region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.

Cache attribute values are specific for the MMU type. For region protection MMUs: 1: WT cached, 2: cache bypass, 4: WB cached, f: illegal. For full MMU: bit 0: executable, bit 1: writable, bits 2..3: 0: cache bypass, 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is reserved). For MPU: 0: illegal, 1: WB cache, 2: WB, no-write-allocate cache, 3: WT cache, 4: cache bypass.

Hardware

LKDDb

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Sources

This page is automaticly generated with free (libre, open) software lkddb(see lkddb-sources).

The data is retrived from:

• Linux kernel
• Linux Kernel Driver DataBase (LKDDb)

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