CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE: DMA addressing mode

General informations

The Linux kernel configuration item CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE has multiple definitions:

DMA addressing mode found in drivers/scsi/Kconfig

The configuration item CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE:

• prompt: DMA addressing mode
• type: int
• depends on: CONFIG_SCSI_SYM53C8XX_2
• defined in drivers/scsi/Kconfig
• found in Linux kernels: 2.5.45–2.5.75, 2.6.0–2.6.39, 3.0–3.19, 4.0–4.20, 5.0–5.19, 6.0–6.11, 6.12-rc+HEAD

Help text

This option only applies to PCI-SCSI chips that are PCI DAC capable (875A, 895A, 896, 1010-33, 1010-66, 1000).

When set to 0, the driver will program the chip to only perform 32-bit DMA. When set to 1, the chip will be able to perform DMA to addresses up to 1TB. When set to 2, the driver supports the full 64-bit DMA address range, but can only address 16 segments of 4 GB each. This limits the total addressable range to 64 GB.

Most machines with less than 4GB of memory should use a setting of 0 for best performance. If your machine has 4GB of memory or more, you should set this option to 1 (the default).

The still experimental value 2 (64 bit DMA addressing with 16 x 4GB segments limitation) can be used on systems that require PCI address bits past bit 39 to be set for the addressing of memory using PCI DAC cycles.

DMA addressing mode found in arch/sparc64/Kconfig

The configuration item CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE:

• prompt: DMA addressing mode
• type: int
• depends on: CONFIG_SCSI_SYM53C8XX_2
• defined in arch/sparc64/Kconfig
• found in Linux kernels: 2.5.45–2.5.72

Help text

This option only applies to PCI-SCSI chip that are PCI DAC capable (875A, 895A, 896, 1010-33, 1010-66, 1000).

When set to 0, only PCI 32 bit DMA addressing (SAC) will be performed. When set to 1, 40 bit DMA addressing (with upper 24 bits of address set to zero) is supported. The addressable range is here 1 TB. When set to 2, full 64 bits of address for DMA are supported, but only 16 segments of 4 GB can be addressed. The addressable range is so limited to 64 GB.

The safest value is 0 (32 bit DMA addressing) that is guessed to still fit most of real machines.

The preferred value 1 (40 bit DMA addressing) should make happy properly engineered PCI DAC capable host bridges. You may configure this option for Intel platforms with more than 4 GB of memory.

The still experimental value 2 (64 bit DMA addressing with 16 x 4GB segments limitation) can be used on systems that require PCI address bits past bit 39 to be set for the addressing of memory using PCI DAC cycles.

Hardware

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The data is retrived from:

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