CONFIG_CLK_LS1028A_PLLDIG: Clock driver for LS1028A Display output

General informations

The Linux kernel configuration item CONFIG_CLK_LS1028A_PLLDIG:

• prompt: Clock driver for LS1028A Display output
• type: tristate
• depends on: CONFIG_ARCH_LAYERSCAPE || CONFIG_COMPILE_TEST
• defined in drivers/clk/Kconfig
• found in Linux kernels: 5.6–5.19, 6.0–6.8, 6.9-rc+HEAD
• modules built: clk-plldig

Help text

This driver support the Display output interfaces(LCD, DPHY) pixel clocks of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all features of the PLL are currently supported by the driver. By default, configured bypass mode with this PLL.

Hardware

LKDDb

Raw data from LKDDb:

• lkddb module clk-plldig CONFIG_CLK_LS1028A_PLLDIG : drivers/clk/Kconfig : "Clock driver for LS1028A Display output" # in 5.6–5.19, 6.0–6.8, 6.9-rc+HEAD
• lkddb of "" "" "fsl,ls1028a-plldig" : CONFIG_CLK_LS1028A_PLLDIG : drivers/clk/clk-plldig.c # in 5.6–5.19, 6.0–6.8, 6.9-rc+HEAD
• lkddb platform "plldig-clock" : CONFIG_CLK_LS1028A_PLLDIG : drivers/clk/clk-plldig.c # in 5.6–5.19, 6.0–6.8, 6.9-rc+HEAD

Sources

This page is automaticly generated with free (libre, open) software lkddb(see lkddb-sources).

The data is retrived from:

• Linux kernel
• Linux Kernel Driver DataBase (LKDDb)

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